000 00751nam a22002417a 4500
003 BUL
005 20170615150250.0
008 170615b xxu||||| |||| 00| 0 eng d
020 _a9781259098635
_a125909863X
_cRs.699/-
040 _aBUL
082 _a621.3192
_bHAY'P12
100 _aHayt, William
245 _aEngineering circuit analysis
_cWilliam Hayt, Jack E. Kemmerly, Steven M. Durbin
250 _a8th ed., Indina ed
260 _aNew Delhi
_bMcGraw Hill Education (India)
_cc2012 (11th reprint 2016)
300 _axxi, 852p. +
_bill. Table
500 _aMat lab examples
650 _aElectric circuit analysis.
650 _aElectric network analysis.
700 _aKemmerly, Jack E.
700 _aDurbin, Steven M.
942 _cBOOK
999 _c935
_d935